FC2Video

Sketching is a new programming model that incorporates localized software synthesis to make programming easier. The model is based on the observation that only some aspects of the program require the full insight and expertise of the programmer; the rest are low-level details needed to make the insights work. Sketching allows the programmer to focus the synthesizer on those low-level aspects while maintaining control over the implementation strategy. This makes programming easier while keeping the synthesis process scalable. This talk will describe the sketching programming model and its application to concurrent programming. The talk will describe the basic algorithms behind sketching, and the main insights that allow them to scale to interesting concurrent programming problems.

C-to-gates synthesis is attractive as a way of allowing software developers to implement their computations on FPGAs for co-processing as well as to hardware engineers to help improve productivity. However, a typical C-to-gates synthesis systems places many restrictions on the subset of C which can be effectively synthesized into hardware. In particular, it is almost impossible to write idiomatic C code using malloc/free and dynamic data structures and have it automatically synthesized into gates. We present the preliminary results of a project that uses recent advances in shape analysis to help us automatically transform some C programs that make use of dynamic memory to represent lists and trees into representations that have the dynamic memory accesses transformed into accesses into a statically allocated collection of heaps. We are only able to perform this transformation when we can statically determine a bound on the amount of dynamic memory used which we are able to do for an interesting collection of examples including a Huffman encoder, a priority encoder, and a network packet processor. The final result of our synthesis flow is a VHDL circuit description which can be further synthesized into an implementation of a circuit that executes on an FPGA.

One challenge in the analysis of concurrent systems arises with the uncertainty due to the inability of components to observe all occurring events. We discuss games with imperfect information as a modeling framework for such systems. In the first part of our talk, we survey fundamental models of games with imperfect information, and illustrate motivating scenarios for the analysis of interactive systems, in particular controller synthesis, compositional system design, and verification of cryptographic protocols. We present a classical algorithm for solving a basic, but paradigmatic, model of imperfect-information games.This algorithm performs a reduction to perfect-information games via a power-set construction that involves a state-space explosion. In the second part of the talk, we present a generic symbolic approach for dealing with the state-explosion problem. We show that the structure of the classical reduction can be ********* to design a compact data structure. On this data structure, we can compute some important symbolic operations efficiently, while other operations are shown to be NP-hard. We present symbolic algorithms to compute the winning positions of a game of imperfect information, and we extend them to construct winning strategies. Finally, we present experimental results obtained with the tool Alpaga.

I first wrote about rely/guarantee reasoning in the early 80s! Since then, a lot of developments have been made but the basic ideas (that "interference" is the essence of concurrency; if one wants a compositional approach to design, one must record assumptions about interference; and that granularity is a delicate issue) have become widely accepted. More recently, I have been developing ideas about "atomicity refinement"; see "R/G thinking" as wider than any specific set of rules; realised that expressive weakness is a key to success; and appreciated the role of data reification in achieving complex R/G specifications. I'd like to review in this talk my reservations about "ghost variables" and to try to pin down where they are really required.

Synthesis is the automated construction of a system from its specification. In the classical temporal synthesis algorithms, it is always assumed the system is “constructed from scratch” rather than “composed” from reusable components. This, of course, rarely happens in real life. In real life, almost every non-trivial commercial system, either in hardware or in software system, relies heavily on using libraries of reusable components. Furthermore, other contexts, such as web-service orchestration, can be modeled as synthesis of a system from a library of components. In this work we de·ne and study the problem of LTL synthesis from libraries of reusable components. We de·ne two notions of composition: data-·ow com- position, for which we prove the problem is undecidable, and control-·ow com- position, for which we prove the problem is 2EXPTIME-complete. As a side bene·t we derive an explicit characterization of the information needed by the synthesizer on the underlying components. This characterization can be used as a specification formalism between component providers and integrators.

Synthesis is the automated construction of a system from its specification. In the classical temporal synthesis algorithms, it is always assumed the system is “constructed from scratch” rather than “composed” from reusable components. This, of course, rarely happens in real life. In real life, almost every non-trivial commercial system, either in hardware or in software system, relies heavily on using libraries of reusable components. Furthermore, other contexts, such as web-service orchestration, can be modeled as synthesis of a system from a library of components. In this work we de·ne and study the problem of LTL synthesis from libraries of reusable components. We de·ne two notions of composition: data-·ow com- position, for which we prove the problem is undecidable, and control-·ow com- position, for which we prove the problem is 2EXPTIME-complete. As a side bene·t we derive an explicit characterization of the information needed by the synthesizer on the underlying components. This characterization can be used as a specification formalism between component providers and integrators.

In synthesis, we aim to construct a finite-state reactive system from a given omega-regular specification. Initial specifications are often unrealizable, which means that there is no system that implements the specification. A common reason for unrealizability is that assumptions on the environment of the system are incomplete. We study the problem of correcting an unrealizable specification G by computing an environment assumption A such that the new specification A -> G is realizable. In this talk, I will give a short introduction into the synthesis problem and the underlying game theory, discuss desired properties of assumptions, and present a two-step algorithm to compute useful environment assumptions. Our algorithm operates on the game graph that is used to answer the realizability question. First, it computes a safety assumption that removes a minimal set of environment edges from the graph. Second, it computes a liveness assumption that puts fairness conditions on some of the remaining environment edges. We use probabilistic games to compute the liveness assumptions. This is joint work with Krishnendu Chatterjee and Tom Henzinger.